Area image sensor

ABSTRACT

The present invention provides a CMOS area image sensor that makes it possible to prevent or reduce at least image quality degradation based on an inappropriate brightness distribution that is produced in the pickup image and image degradation based on image distortion that is produced in the pickup image to obtain a high-quality pickup image. A plurality of pixels arranged in a lattice shape on the imaging face of the CMOS area image sensor are constituted by a photodiode  10 , a select transistor TRs for outputting accumulated electrical charge resulting from exposure from the photodiode  10 , an electrical charge holding circuit comprising a capacitor C for temporarily holding the accumulated electrical charge from the photodiode  10  and a transfer transistor TRt for controlling the transfer of the accumulated electrical charge to the capacitor C; and a reset transistor TRr for discharging the residual electrical charge of the capacitor C. The level of an inappropriate photoelectric conversion signal of each pixel arising from a non-uniform transmissive light amount distribution to the imaging face of the imaging optical system as a result of the photoelectric conversion signal that is outputted by each pixel being multiplied by a vertical correction coefficient that is preset for each row and a horizontal correction coefficient that is preset for each column is corrected.

TECHNICAL FIELD

The present invention relates to a CMOS (Complementary Metal OxideSemiconductor)-type area image sensor that is integrated into a digitalcamera or the like, for example and relates, more particularly, to atechnology for improving the quality of an image that is imaged by thearea image sensor.

BACKGROUND ART

The area image sensor has photoelectric conversion elements consistingof a plurality of photodiodes and so forth (referred to as ‘pixels’hereinbelow) arranged in the form of a lattice, converts a subjectoptical image that is imaged on the pixel placement face (imaging face)by means of an imaging lens to an electrical signal (voltage signal)with a size corresponding to the amount of light received from eachpixel, and outputs electrical signals from each pixel in a predeterminedorder. The electrical signals (signals corresponding to the density ofthe image) from each pixel are stored in memory so as to be arranged inthe light-receiving position of each pixel on the basis of the outputtedorder after being converted to a digital signal, whereby an electricalsignal corresponding to the subject optical image is obtained.

FIG. 23 is a constitution of one pixel of the conventional CMOS areaimage sensor shown in JP-A 2001-036816, for example. One pixel isconstituted by a photodiode PD that performs conversion to an electricalcharge amount according to the received light amount and accumulates theelectrical charge; a reset transistor M1 consisting of a FET (FieldEffect Transistor) for discharging electrical charge remaining in thephotodiode PD before starting exposure; a switching transistor M3consisting of an FET for controlling the timing for reading to a signalline L for the charge that has accumulated in the photodiode PD(exposure end timing), an amplification transistor M2 consisting of aFET for amplifying a voltage signal (voltage signal of the cathode ofthe photodiode PD) based on the electrical charge when the electricalcharge that has accumulated in the photodiode PD after the end ofexposure is outputted to the outside by the signal line L.

The cathode of the photodiode PD is grounded and the anode is connectedto the source of the reset transistor M1 and the gate of theamplification transistor M2. Further, the drain of the reset transistorM1 and the drain of the amplification transistor M2 are connected to aVDD power supply. The source of the amplification transistor M2 isconnected to the drain of the switching transistor M3 and the source ofthe switching transistor M3 is connected to the signal line L. Further,the gate of the reset transistor M1 is connected to a reset line R andthe gate of the switching transistor M3 is connected to an address lineA.

Signal lines L for outputting an electrical signal (known as a ‘lightreception signal’ hereinbelow) from a plurality of pixels that arearranged in columns on the right side of each column, for example, witha plurality of pixels arranged in a lattice shape are arranged andaddress lines A for inputting a signal (read signal) for controlling theread timing for reading a reception signal to a plurality of pixelsarranged in the row below each column, for example, and reset lines Rfor inputting a signal (reset signal) for controlling the dischargetiming of the remaining electrical charge are arranged. A plurality ofA/D converters 101 are provided in correspondence with each signal lineL below the imaging face and the lower end of each signal line L isconnected to the corresponding A/D converter 101. The source of theswitching transistor M3 of the plurality of pixels arranged in eachcolumn is connected to the corresponding signal line L.

Further, one end of each address line A and each reset line R isconnected to a control portion 100 that controls the output of the readsignal and reset signal. The gates of the switching transistors M3 ofthe plurality of pixels arranged in each row are connected to thecorresponding address lines A and the gates of the reset transistor M1of the plurality of pixels arranged in each row are connected to thecorresponding reset lines R.

The imaging operation by the CMOS area image sensor is performed asfollows.

Suppose that the row numbers from the pixel column of the highest row ofthe imaging face to the pixel column of the lowest row are 1, 2, . . .n, and the address numbers of the address lines corresponding to eachrow are 1, 2, . . . n, a vertical synchronization signal is used as asynchronization signal for controlling an exposure operation from thefirst row to the nth row, that is, an exposure operation equivalent toone screen and a horizontal synchronization signal is used as asynchronization signal for controlling the exposure operation for eachrow. When a vertical synchronization signal is inputted, a read signaland reset signal are outputted in sync with the horizontalsynchronization signal to each row in order from the first row by meansof the control portion 100. The plurality of pixels arranged in each roware reset (discharge of remaining electrical charge) by means of a resetsignal after the light reception signal has been read to the A/Dconverter 101 via the signal line L by means of the read signal and theexposure is started, wherein the exposure operation is performed untilthe next read signal and reset signal are inputted.

Therefore, with this CMOS area image sensor, the exposure operation ofthe plurality of pixels arranged in each row is started by providing atime difference corresponding to a cycle Th of the horizontalsynchronization signal and, when time that corresponds to a cycle Tv ofthe vertical synchronization signal has elapsed, the exposure operationis ended, whereupon the reception signal is read from each pixel, A/Dconverted by the A/D converter 101, and then outputted to an externalframe memory via a shift register. Further, the time difference betweenthe start of exposure of the uppermost row and the start of exposure ofthe lowermost row is a time corresponding substantially to the cycle Tvof the vertical synchronization signal and, therefore, the lightreception signals of all the pixels that constitute an image of oneframe are obtained after the time 2Tv corresponding to two cycles' worthof the vertical synchronization signal has elapsed after the start ofexposure.

Further, the conventional CMOS area image sensor is the main cause ofdegradation of the pickup image (original image) on account of thestructure of this sensor and processing to compensate for the imagedegradation is required in a circuit downstream of the CMOS area imagesensor.

For example, because the area image sensor has a flat imaging face witha horizontal rectangular shape, when the light of the average lightamount is irradiated on the imaging face by means of an imaging lens aswill be described subsequently, there is the problem that the lightamount does not enter the whole of the imaging face uniformly and theperiphery of the pickup image is then darker than the center thereof,that is, the brightness distribution of the original image differs fromthe subject optical image.

FIG. 24 is a schematic diagram showing an imaging optical system of adigital camera in which an area image sensor IS is provided. Accordingto FIG. 24, when light reaching the area image sensor IS via the centerof the lens Z is examined, while the incident light A enters the centerSo of the image read area S of the area image sensor IS via the centerof the lens Z, light B that enters at an angle θ with respect to theincident light A enters the peripheral part Sr of the image read area S.The light path length from the center of the lens Z to the image readarea S grows longer as light reaches the periphery of the image readarea and, therefore, supposing that the light amount at the center So ofthe image read area S is 1, the light amount at the peripheral part Srof the image read area S is theoretically determined by cos⁴ θ. Thus, inthe area image sensor IS with a flat imaging face, the light amount atthe peripheral part of the image read area S is small in comparison withthe light amount at the center So of the image read area S. Thistendency is more pronounced the more compact the imaging device isrendered by making the distance to the image sensor from the lens short.

Further, FIG. 25 shows the distribution of light amounts in the imageread area S. As shown in the same figure, in the image read area S, thelight amount is maximum at the center corresponding with the opticalcenter of the lens and grows smaller toward the peripheral part. Morespecifically, the light amount gradually decreases in moving furtheraway from the center point O and, in a remote area at substantially thesame distance from the center point O, the light amount is substantiallythe same. The light amount distribution in an X cross-section of theimage read area S is expressed by a secondary curved line in which thecenter point O has the maximum light amount, and, at a point P₁ on the Xaxis a distance Lx from the center point O, a light amount at which themaximum light amount is x %, for example, is produced, as shown in FIG.25B. Further, the light amount distribution of the Y-axis cross-sectionis also, as shown in FIG. 25C, expressed by a secondary curved line forwhich the center point O has the maximum light amount and, at a point P₂on the Y axis a distance Ly from the center point O, a light amount atwhich the maximum light amount is y %, for example, is produced. If theimage is outputted by reflecting the light amount distribution of suchan area image sensor as is, the image grow dark toward the periphery.

Therefore, in the case of a conventional area image sensor, a variety oftechniques enabling a substantially uniform brightness to be obtainedover the whole area of the output image by correcting such a lightamount distribution have been proposed. For example, it has beenproposed that a DSP (digital signal processor) for correcting a digitalsignal be incorporated in the area image sensor and that correction beperformed as a result of the DSP multiplying the output value of eachlight-receiving element by the reciprocal number value of the ratio withrespect to the maximum light amount of the light amount at the pointswhere the light-receiving elements are positioned.

For example, the light amount at point P₁ shown in FIG. 25 has a maximumlight amount of x % and, therefore, the reciprocal number value at pointP₁ is (100/x). Therefore, when the output values of the pixels arrangedon points P₁ of the image read region S are multiplied by the reciprocalnumber value, corrected values that are substantially the same as themaximum light amount are obtained, as shown in FIG. 26. As a result, byperforming correction by multiplying the output value of each pixel bythe reciprocal number value corresponding with each pixel, asubstantially uniform brightness is obtained over the whole of theoutput image.

However, this method of multiplying reciprocal number values by usingthe DSP necessitates the allocation of the reciprocal number values toall the pixels and, therefore, there is the drawback that a memorycomprising a correction table in which a multiplicity of reciprocalnumber values are stored must be provided, and so forth. Moreover, inthis case, the greater the number of pixels, the larger the number ofreciprocal number values and a large memory capacity is thereforerequired, which leads to an increase in costs.

In order to limit the memory capacity, as shown in FIG. 27, creating acorrection table that corresponds only to the pixels in one quadrant ofthe image read area S and using this correction table by expanding sameto the other quadrants may also be considered. With this method,although the memory capacity can be reduced to substantially ¼, it ishard to say that there will be an adequate cost reduction.

Further, as a method that makes it possible to obtain a uniform lightamount over the whole area of the image read area S without correctingthe output from the pixels, combining a so-called ND (neutral density)filter with reduced light transmission toward the center of the imageread area S with an area image sensor has been proposed. That is, ifthis ND filter is disposed in the vicinity of the front face of the areaimage sensor, the light amount at the center of the image read area Scan be compulsorily reduced by the ND filter and, therefore, the wholeof the image read area S can be afforded a uniform light amount.

However, in this case, by integrating the light amount of the internalregion of the image read area S with the light amount of the peripheralregion by cutting the incident light, there is the inconvenience ofreducing the output of the whole of the area image sensor.

Further, as mentioned earlier, a conventional CMOS area image sensorgenerates image data equivalent to one frame by performing the exposureoperation for a time corresponding to the cycle Tv of the verticalsynchronization signal for each row in order by providing a timedifference corresponding to a cycle Th of the horizontal synchronizationsignal from the uppermost row to the lowermost row and, therefore, whenthe subject optical image moves to the right within the imaging face inaccordance with the movement of the photographic subject, for example,there is a shift between the position of the photographic subject at theexposure timing at the top within the imaging face and the position ofthe photographic subject at the exposure timing at the bottom, wherebythe pickup image is an image in which the photographic subject drifts tothe right side as one approaches the lower side of the screen. The driftstate of the photographic subject grows larger with increased speed ofmovement of the photographic subject and, in cases where thephotographic subject moves at high speed, this constitutes a movingimage and image distortion is generated.

In order to resolve this problem, making the shift in the exposure starttiming of each row by shortening the cycle Th of the horizontalsynchronization signal, for example, as small as possible may also beconsidered. However, when the frequency of the horizontalsynchronization signal is increased, another problem arises that theelectrical power consumed by the area image sensor increases as a resultof the increase in the electrical power consumed by the A/D converter101 and so forth.

As detailed earlier, a conventional CMOS area image sensor has factorsthat cause image degradation in the original image in that the pickupimage grows darker toward the periphery even when the pickup image issmall on account of the structure of the CMOS area image sensor andimage distortion is readily produced in the pickup image with respect toa moving body.

DISCLOSURE OF THE INVENTION

The present invention was conceived to resolve the above problem andprovides an area image sensor that makes it possible to prevent orreduce at least image quality degradation based on an inappropriatebrightness distribution that is produced in the pickup image and imagedegradation based on image distortion that is produced in the pickupimage to obtain a high-quality pickup image.

The area image sensor provided by the present invention is an area imagesensor comprising a plurality of pixels arranged in a lattice shape onan imaging face for photoelectrically converting light of a subjectoptical image that is focused on the imaging face via an imaging opticalsystem into an electrical signal in each pixel and outputting theelectrical signal, each pixel comprising: a photoelectric conversionelement that converts light rendered through exposure by accumulatingelectrical charge in accordance with a received light amount into anelectrical signal; a select transistor for outputting to the outsideaccumulated electrical charge from the photoelectric conversion elementfollowing the end of exposure; one or two or more electrical chargeholding circuits provided between the photoelectric conversion elementand the select transistor that comprise a capacitor for temporarilyholding electrical charge that has accumulated as a result of exposurefrom the photoelectric conversion element and a transfer transistor forcontrolling the transfer of the accumulated electrical charge of thephotoelectric conversion element to the capacitor; and a resettransistor provided between the select transistor and the electricalcharge holding circuit for discharging residual electrical charge of thecapacitor prior to the start of exposure, wherein, while determining ahorizontal correction coefficient for correcting the level of aphotoelectric conversion signal that is outputted from the pixelscorresponding with each point located on a horizontal coordinate axisthat passes through a predetermined point of the image read area in theimaging face and a vertical correction coefficient for correcting thelevel of a photoelectric conversion signal that is outputted from thepixels corresponding with each point located on a vertical coordinateaxis that passes through a predetermined point of the image read area inthe imaging face, the level of the photoelectric conversion signal ofeach pixel is corrected by multiplying the photoelectric conversionsignal that is outputted by each pixel in the image read area by thehorizontal correction coefficient corresponding with the horizontalcoordinate of each pixel and the vertical correction coefficient thatcorresponds with the vertical coordinate.

The area image sensor provided by the present invention is an area imagesensor comprising a plurality of pixels arranged in a lattice shape onan imaging face for photoelectrically converting light of a subjectoptical image that is focused on the imaging face via an imaging opticalsystem into an electrical signal in each pixel and outputting theelectrical signal, each pixel comprising: a photoelectric conversionelement that converts light rendered through exposure by accumulatingelectrical charge in accordance with a received light amount into anelectrical signal; a select transistor for outputting to the outsideaccumulated electrical charge from the photoelectric conversion elementfollowing the end of exposure; one or two or more electrical chargeholding circuits provided between the photoelectric conversion elementand the select transistor that comprise a capacitor for temporarilyholding electrical charge that has accumulated as a result of exposurefrom the photoelectric conversion element and a transfer transistor forcontrolling the transfer of the accumulated electrical charge of thephotoelectric conversion element to the capacitor; and a resettransistor provided between the select transistor and the electricalcharge holding circuit for discharging residual electrical charge of thecapacitor prior to the start of exposure.

The area image sensor provided by the present invention is an area imagesensor comprising a plurality of pixels arranged in a lattice shape onan imaging face for photoelectrically converting light of a subjectoptical image that is focused on the imaging face via an imaging opticalsystem into an electrical signal in each pixel and outputting theelectrical signal, wherein, while determining a horizontal correctioncoefficient for correcting the level of a photoelectric conversionsignal that is outputted from the pixels corresponding with each pointlocated on a horizontal coordinate axis that passes through apredetermined point of the image read area in the imaging face and avertical correction coefficient for correcting the level of aphotoelectric conversion signal that is outputted from the pixelscorresponding with each point located on a vertical coordinate axis thatpasses through a predetermined point of the image read area in theimaging face, the level of the photoelectric conversion signal of eachpixel is corrected by multiplying the photoelectric conversion signalthat is outputted by each pixel in the image read area by the horizontalcorrection coefficient corresponding with the horizontal coordinate ofeach pixel and by the vertical correction coefficient that correspondswith the vertical coordinate.

The above-mentioned area image sensor may be constituted such that theelectrical charge accumulation circuit has a constitution in which oneelectrode of the capacitor is connected to the output terminal of thetransfer transistor and the other electrode is grounded; and the inputterminal of the transfer transistor is connected to the photoelectricconversion element side and one electrode of the capacitor is connectedto the reset transistor side.

Further, the above-mentioned area image sensor may be constituted suchthat, in each pixel, two of the electrical charge holding circuits areconnected in series between the photoelectric conversion element and theselect transistor and a second reset transistor for discharging residualelectrical charge of the photoelectric conversion element prior to thestart of exposure is connected to the input terminal of thephotoelectric conversion element.

Further, the above-mentioned area image sensor may be constituted suchthat a plurality of signal lines for outputting photoelectric conversionsignals from a plurality of pixels arranged in each column is providedin each column; a plurality of transfer control lines, reset lines, andaddress lines, which serve to control the ON/OFF of the transfertransistor, the reset transistor and the select transistor respectivelyof a plurality of pixels arranged in each row, are provided in each row;and the simultaneous exposure of all the pixels is started bysimultaneously outputting reset signals and transfer signals to all ofthe reset lines and all of the transfer control lines respectively andthe simultaneous exposure of all the pixels is subsequently terminatedby outputting the transfer signals once again to all of the transfercontrol lines when a predetermined exposure time has elapsed, whereuponphotoelectric conversion signals resulting from the simultaneousexposure of all the pixels are simultaneously outputted to each row fromthe plurality of pixels arranged in each row by sequentially outputtingselect signals to the address lines of each row in sync with a pluralityof horizontal synchronization signals outputted in sync with a verticalsynchronization signal.

Further, the above-mentioned area image sensor may be constituted suchthat a plurality of signal lines for outputting photoelectric conversionsignals from a plurality of pixels arranged in each column is providedin each column; a plurality of transfer control lines, reset lines, andaddress lines, which serve to control the ON/OFF of the transfertransistor, the reset transistor and the select transistor respectivelyof a plurality of pixels arranged in each row, are provided in each row;and simultaneous exposure of all the pixels of a time that correspondsto the cycle of a vertical synchronization signal is repeated bysimultaneously outputting a reset signal and transfer signal to all ofthe reset lines and all of the transfer control lines respectively insync with the vertical synchronization signal and photoelectricconversion signals resulting from the simultaneous exposure of all thepixels of one exposure period earlier are simultaneously outputted toeach row from the plurality of pixels arranged in each row bysequentially outputting select signals to the address lines of each rowin sync with a plurality of horizontal synchronization signals outputtedin sync with a vertical synchronization signal during each exposureperiod.

In addition, the above-mentioned area image sensor may comprise aplurality of A/D conversion means provided in each column that performconversion to a digital signal by comparing the level of an analogphotoelectric conversion signal that is outputted by a plurality ofpixels arranged in each column with a predetermined reference level;first reference level setting means that set, for the A/D conversionmeans, a different reference level for each row in accordance with avalue that is associated with the vertical correction coefficient when aphotoelectric conversion signal is outputted by a plurality of pixelsarranged in each row in row units; and second reference level settingmeans that set, for each of the A/D conversion means, a differentreference level in accordance with a value that is associated with thehorizontal correction coefficient.

Further, in the case of the above-mentioned area image sensor, thehorizontal setting means may set a different reference level for each ofthe A/D conversion means by dividing the reference voltage by means ofresistors.

Further, the above-mentioned area image sensor may comprise a pluralityof A/D conversion means provided in each column that perform conversionto a digital signal by comparing the level of an analog photoelectricconversion signal that is outputted by a plurality of pixels arranged ineach column with a predetermined reference level; first reference levelsetting means that set, for the A/D conversion means, a differentreference level for each row in accordance with a value that isassociated with the vertical correction coefficient when an analogsignal is outputted by a plurality of pixels arranged in each row in rowunits; and second reference level setting means that count the output ofeach of the A/D conversion means with a predetermined count rangeserving as a reference and set a different count range for each of theA/D conversion means in accordance with a value that is associated withthe horizontal correction coefficient.

In addition, the above-mentioned area image sensor may comprisehorizontal correction coefficient storage means that pre-store ahorizontal correction coefficient corresponding with each point locatedon a horizontal coordinate axis that passes through a predeterminedpoint of the image read area; vertical correction coefficient storagemeans that pre-store a vertical correction coefficient correspondingwith each point located on a vertical coordinate axis that passesthrough a predetermined point of the image read area; and multiplicationmeans that multiply a photoelectric conversion signal that is outputtedby each pixel in the image read area by a horizontal correctioncoefficient corresponding with a horizontal coordinate of the pixel thatis stored in the horizontal correction coefficient storage means and bya vertical correction coefficient corresponding with a verticalcoordinate of the pixel that is stored in the vertical correctioncoefficient storage means.

Further, the horizontal correction coefficient storage means may storethe horizontal correction coefficient by thinning the horizontalcorrection coefficient, and the vertical correction coefficient storagemeans may store the vertical correction coefficient by thinning thevertical correction coefficient.

According to the area image sensor of the present invention, anelectrical charge holding circuit comprising a capacitor for temporarilyholding electrical charge that has accumulated as a result of exposurefrom a photoelectric conversion element and a transfer transistor forcontrolling the transfer of the accumulated electrical charge of thephotoelectric conversion element to the capacitor is provided betweenthe photoelectric conversion element of each pixel and the selecttransistor and, therefore, separation of the timing of the exposureoperation of each pixel and the read timing of the photoelectricconversion signal obtained by the exposure operation is possible and, bysequentially reading the photoelectric conversion signals obtained byexposure from each pixel after exposing all the pixels with the sametiming in row units in sync with the horizontal synchronization signal,for example, it is possible to obtain a pickup image with no imagedistortion even when the photographic subject is a moving object.

Further, a horizontal correction coefficient for correcting the level ofthe photoelectric conversion signal outputted by each pixel positionedon a horizontal coordinate axis that passes through a predeterminedpoint of an image read region in the imaging face and a verticalcorrection coefficient for correcting the level of the photoelectricconversion signal outputted by each pixel positioned on a verticalcoordinate axis that passes through a predetermined point of an imageread region in the imaging face are set and, by multiplying each pixelin the photoelectric conversion signal outputted by each pixel by thehorizontal correction coefficient and vertical correction coefficientcorresponding to each pixel, the level of the photoelectric conversionsignal of each pixel is corrected. Therefore, the capacity of the memorystoring the correction coefficients for correcting the level of thephotoelectric conversion signal can be markedly reduced.

BRIEF DESCRIPTION OF THE DRAWINGS

FIG. 1 is a constitutional view showing a first embodiment of the areaimage sensor according to the present invention;

FIG. 2 is a circuit diagram of a photodiode and switching circuit;

FIG. 3 is a block diagram of an A/D converter;

FIG. 4 is a timing chart of a reference voltage signal and pixel signal;

FIG. 5 is a circuit diagram showing an example of a voltage dividercircuit;

FIG. 6 shows an example of the constitution of the address lines;

FIG. 7 shows the relationship between the amount of light received onthe X and Y axes of the image read area;

FIG. 8 is a timing chart of a reference voltage signal and pixel signal;

FIG. 9 is a timing chart of a reference voltage signal and pixel signal;

FIG. 10 shows the relationship between the reference voltage signal andpixel signal;

FIG. 11 shows the ratio with respect to the maximum amount of lightreceived of the received light amounts of the photodiodes arranged inhorizontal and vertical directions;

FIG. 12 is a circuit diagram showing an example of a voltage dividercircuit;

FIG. 13 shows an example of the count range of the A/D converter;

FIG. 14 shows a conventional DSP block constitution;

FIG. 15 shows a DSP block constitution in a case where a DSP is appliedto the area image sensor of the present invention;

FIG. 16 shows another block constitution of a DSP in a case where thearea image sensor of the present invention is applied to a DSP;

FIG. 17 is a circuit diagram showing a constitution corresponding to onepixel of a second embodiment of the area image sensor of the presentinvention;

FIG. 18 is a time chart showing the exposure operation in a normal inputmode that is the same as that of the prior art;

FIG. 19 is a time chart showing the exposure operation in a globalshutter input mode with a relatively short exposure time and the sameexposure timing for all the pixels;

FIG. 20 is a time chart showing the exposure operation in a globalshutter input mode with a relatively long exposure time and the sameexposure timing for all the pixels;

FIG. 21 is a circuit diagram showing a constitution corresponding to onepixel of a modified example of a CMOS area image sensor of the secondembodiment;

FIG. 22 is a time chart showing the exposure operation in the globalshutter input mode of the CMOS area image sensor of the modifiedexample;

FIG. 23 shows the constitution of one pixel of a conventional CMOS areaimage sensor;

FIG. 24 is a schematic diagram showing an imaging optical system of adigital camera;

FIG. 25 shows the distribution of light amounts of the image read area;

FIG. 26 shows the relationship between the distance from the center in aY-axis cross-section and the proportion of the light amount; and

FIG. 27 shows an area (one quadrant) of substantially ¼ of the imageread area.

BEST MODE FOR CARRYING OUT THE INVENTION

Preferred embodiments of the present invention will be specificallyillustrated hereinbelow with reference to the attached drawings.

FIG. 1 illustrates a constitutional view showing the first embodiment ofthe area image sensor of the present invention. This area image sensoris used in a digital camera or the like and comprises a horizontal imageread area S. The image read area S is provided with photodiodes 1constituting a plurality of photoelectric conversion elements arrangedin a lattice shape, a plurality of switching circuits 2 connected to thephotodiodes 1, address lines 3 extending in the row direction(horizontal direction), and read lines 4 extending in the columndirection (vertical direction).

The photo diode 1 and switching circuit 2 constitute one pixel bycombining one each of the photo diode 1 and switching circuit 2. Theaddress lines 3 are provided in a plurality in the vertical directionfor each of the plurality of horizontally arranged photodiodes 1. Eachaddress line 3 is connected to a control portion 9 and a control signal(vertical synchronization signal) for controlling the ON/OFF of theplurality of select transistors 2 a arranged in rows corresponding witheach address line 3 is outputted by the control portion 9.

Further, the read lines 4 are provided in a plurality of in thehorizontal direction for each of the plurality of vertically arrangedphotodiodes 1. Each read line 4 is connected to a plurality of A/Dconverters 6 provided for each read line 4 at the bottom of the imageread area S.

The photodiodes 1 are elements that convert light into an electricalcharge amount corresponding with the received light amount andaccumulate the electrical charge. Although not illustrated in detail,the photodiodes 1 comprise a light-receiving face of a planarrectangular shape (not illustrated), for example, and receive light viathis light-receiving face. Each photodiode 1 has the anode side thereofgrounded and the cathode side thereof connected to a switching circuit2.

The switching circuit 2 serves to read electrical charge that isaccumulated by the photodiode 1 and, as shown in FIG. 2, is constitutedby a select transistor 2 a for selecting the photodiode 1, anamplification transistor 2 b for amplifying and outputting theelectrical charge amount that has accumulated in the photodiode 1, and areset transistor 2 c for discharging (resetting) the residual electricalcharge of the photodiode 1.

The address line 3 is connected to the gate terminal of the selecttransistor 2 a. The source terminal of the amplification transistor 2 bis connected to the drain terminal of the select transistor 2 a and theread line 4 is connected to the drain terminal of the amplificationtransistor 2 b. The cathode terminal of the photodiode 1 is connected tothe gate terminal of the amplification transistor 2 b and the drainterminal of the reset transistor 2 c is connected to the gate terminalof the amplification transistor 2 b. The reset line R (not shown inFIG. 1) is connected to the gate element of the reset transistor 2 c.Further, a bias line B (not shown in FIG. 1) is connected to therespective source terminals of the select transistor 2 a andamplification transistor 2 b.

Similarly to the address lines 3, a reset line R is provided in aplurality in correspondence with a plurality of pixels arranged in eachrow and connected to the control portion 9. Further, the bias line B isconnected to the power supply. A control signal for controlling theON/OFF of the plurality of reset transistors 2 c arranged in rowscorresponding with each reset line R is outputted by the control portion9 to the reset line R.

As a result of this constitution, when a vertical synchronization signal(selection signal) is outputted by the control portion 9 (describedsubsequently) to the address lines 3, the select transistor 2 a isturned ON. As a result, the amplification transistor 2 b is turned ONand the cathode voltage of the photodiode is amplified by theamplification transistor 2 b and outputted to the read lines 4 based onthe electrical charge that has accumulated in the photodiodes 1. Thisoutput voltage is inputted to the A/D converter 6 (describedsubsequently) via the read lines 4.

Returning now to FIG. 1, a plurality of A/D converters 6 for convertingan analog signal to a digital signal are each connected to theconnection end of each read line 4. Shift registers 7 are each connectedto the respective output terminals of the A/D converters 6 and the shiftregisters 7 are serially connected in a daisy chain shape. Further, thecontrol portion 9 is connected to the A/D converters 6 via a voltagedivider circuit 8.

The A/D converter 6 has an overall constitution consisting of a sample &hold circuit 11, a comparator circuit 12, and a counter circuit 13, asshown in FIG. 3.

The sample & hold circuit 11 is a circuit that is connected to the readline 4 and which temporarily holds a signal (known as a ‘pixel signal’hereinbelow) that has been read from each photodiode 1 via the read line4.

The comparator circuit 12 is a circuit for comparing the voltage levelof the pixel signal that is temporarily held by the sample & holdcircuit 11 and the reference voltage that is outputted by the controlportion 9. That is, one input terminal 12 a of the comparator circuit 12is connected to the sample & hold circuit 11 and the other inputterminal 12 b is connected to the voltage divider circuit 8.

Here, when the switching circuit 2 of one line in the horizontaldirection is selected by the select signal, the signal of the referencevoltage varies in a slope shape and as time elapses in the selectiontime T as shown in FIG. 4 and has a waveform with a substantially sawshape so that this variation is repeated each selection time T. Thecycle of the selection time T is prescribed in sync with the timingsignal that is outputted by the control portion 9.

The comparator circuit 12 compares the voltage that is temporarily heldby the sample & hold circuit 11 and the reference voltage and outputs amatch signal when the two voltages match to the counter circuit 13. Thecounter circuit 13 is connected to the output terminal 12 c of thecomparator circuit 12 and repeatedly counts each selection time T ‘0’ to‘1023’, for example, on the basis of a clock signal in sync with theselection time T that is outputted by the control portion 9. The countercircuit 13 is latched by a match signal from the comparator circuit 12and outputs the count value C at the time of the latching to the shiftregister 7. This count value C converts the voltage level of the pixelsignal to a digital value (pixel data).

The shift register 7 is constituted by a flip flop circuit or the like,the input terminal thereof being connected to the output of the countercircuit 13, and temporarily holds the count value C that is outputted byeach counter circuit 13. The plurality of shift registers 7 provided incorrespondence with each column are serially connected and the leadingend is connected to a frame memory (not illustrated). The count value C(pixel data) held in each shift register 7 is sequentially outputted tothe frame memory with predetermined timing in sync with a shift pulse.Pixel data is outputted to the shift register 7 in row units and,therefore, pixel data is stored in row units in the frame memory.Therefore, when the pixel data of all the rows is transferred to theframe memory, one frame's worth of image data is generated. In addition,a moving image is obtained as a result of a plurality of frames' worthof image data being successively generated.

The control portion 9 is the backbone of control of the area imagesensor and outputs a select signal by scanning, for each address line 3,each switching circuit 2 as detailed earlier. The control portion 9inputs a clock signal and timing signal to the A/D converter 6. Further,the control portion 9 inputs a reference voltage, which constitutes acomparison target for the pixel signal that is read from the photodiode1, to the comparator circuit 12 of the A/D converter 6 via the voltagedivider circuit 8.

The voltage divider circuit 8 is constituted by an amplifier 15 and aplurality of resistors R1 to R8, as shown in FIG. 5. The voltage dividercircuit 8 divides the reference voltage and inputs the divided voltagesto each A/D converter 6.

The amplifier 15 amplifies the reference voltage to a predeterminedvoltage value on the basis of a setting signal that is outputted by thecontrol portion 9 and the resistors R1 to R8 divide the output voltageof the amplifier 15.

Further, in the voltage divider circuit 8 shown in FIG. 5, for the sakeof expediency of the description, only resistors R1 to R8 and five A/Dconverters, which are the first to fifth A/D converters 6A, 6B, 6C, 6D,and 6E connected thereto, are mentioned. However, in reality, theresistors and A/D converters are provided in a number corresponding tothe number of read lines 4. Further, the five A/D converters 6A, 6B, 6C,6D, and 6E are connected to the read lines 4 corresponding to thephotodiodes 1 arranged in the column direction of the image read area Sand, more particularly, the third A/D converter 6C is connected via aread lines 4 to photodiodes 1 on a vertical coordinate axis that passesthrough the center of the image read area S.

Further, for the sake of expediency in the illustration, as shown inFIG. 6, only five address lines which are the first to fifth addresslines 3A, 3B, 3C, 3D and 3E are provided and, more particularly, thethird address line 3C is connected to photodiodes 1 arranged on a rowdirection coordinate axis that passes through the center of the imageread area S.

As shown in FIG. 7, the present invention was conceived based on theknowledge that, when the received light amount at the point of origin Oin the image read area S is the maximum received light amount (100%),the ratio of the received light amount at point Px on the X axiscorresponding to the X coordinate of an optional point P in the imageread area S with respect to the maximum received light amount and theratio of the received light amount at point Py on the Y axiscorresponding to the Y coordinate of an optional point P with respect tothe maximum received light amount are substantially equal to the ratioof the received light amount at the optional point P with respect to themaximum received light amount.

That is, in order to obtain the same output value as the pixel receivingthe maximum light amount at an optional point P in the image read areaS, the reciprocal number of the ratio of the received light amount atpoint Px on the X axis corresponding to the X coordinate of an optionalpoint P with respect to the maximum received light amount and thereciprocal number of the ratio of the received light amount at point Pyon the Y axis corresponding to the Y coordinate of an optional point Pwith respect to the maximum received light amount may be used and thesereciprocal numbers may be multiplied by the output value of the pixel atoptional point P.

More specifically, supposing that the ratio of the received light amountat point Px in FIG. 7 with respect to the received light amount (maximumreceived light amount) at the point of origin O is 80% and the ratio ofthe received light amount at point Py with respect to the received lightamount (maximum received light amount) at the point of origin O is 80%,the ratio of the received light amount at point P with respect to themaximum received light amount is 64%. Therefore, if the output value ofthe light-receiving element at point P is multiplied by (100/80), whichis the reciprocal number of the ratio of the light amount at point Pxwith respect to the maximum light amount at the point of origin O, andby (100/80), which is the reciprocal number of the ratio of the lightamount at point Py with respect to the maximum light amount at the pointof origin O, because 64×(100/80)×(100/80)=100, the output value of thelight-receiving element at point P is corrected so as to be equal to theoutput value of the pixel at the point of origin O.

As a result, a horizontal correction coefficient corresponding with eachpoint located on a horizontal coordinate axis (corresponds to the X axisin FIG. 7) that passes through a predetermined point (the center, forexample) of the image read area S and a vertical correction coefficientcorresponding to each point located on a vertical coordinate axis(corresponds to the Y axis in FIG. 7) that passes through the center ofthe image read area S are established, the pixel signal from eachphotodiode 10 f the image read area S is multiplied by a horizontalcorrection coefficient corresponding with the horizontal coordinate (Xcoordinate) of the photodiode 1 and a vertical correction coefficientthat corresponds with the vertical coordinate (Y coordinate) of thephotodiode 1.

Here, the horizontal correction coefficient is established on the basisof the reciprocal number of the ratio of the received light amount ofthe photodiode 1 arranged on the horizontal coordinate axis with respectto the received light amount (maximum received light amount) of thephotodiode 1 located at the center of the image read area S and, if thehorizontal correction coefficient is established on the basis of thereciprocal number of the ratio of the received light amount of thephotodiode 1 arranged on the horizontal coordinate axis with respect tothe received light amount (maximum received light amount) of thephotodiode 1 located at the center of the image read area S, the levelof the pixel signal from the photodiode 1 at each point in the imageread area Scan be corrected to substantially the same level as the pixelsignal from the photodiode 1 that receives the received light amount.

The constitution of this embodiment is the same as, by way of anexample, multiplying the output value of each photodiode by thehorizontal correction coefficient and the vertical correctioncoefficient by setting and changing the reference voltage for each A/Dconverter 6 in association with the horizontal correction coefficientand vertical correction coefficient. The operation of this constitutionwill be described specifically hereinbelow.

First, a case where a reference voltage is set for an A/D converter 6 inthe Y-axis direction (vertical direction) in FIG. 7 will be described.The control portion 9 sequentially outputs a select signal for turningON the switching circuit 2 to the address lines 3. Here, the controlportion 9 sets a reference voltage with a different value in accordancewith the value associated with the A/D direction correction coefficientfor the A/D converter 6 each time the select signal is outputted to theaddress lines 3.

For example, supposing that the reference voltage when the select signalis outputted to the third address line 3C shown in FIG. 6 is anormalization reference voltage (100%), when the control portion 9outputs a select signal to the first address line 3A, the referencevoltage of the A/D converter 6 is set to a reference voltage that issubstantially 67.5%, for example, of the regular reference voltage. Thatis, the control portion 9 inputs a set signal to the amplifier 15 of thevoltage divider circuit 8 so that the amplitude of the reference voltageis substantially 67.5% of the regular reference voltage. As a result,the amplifier 15 inputs a reference voltage the amplitude of which is a0.675 multiple to the A/D converter 6.

Thereafter, when the control portion 9 outputs a select signal to thesecond address line 3B, the reference voltage of the A/D converter 6 isset to a reference voltage that is substantially 90.0%, for example, ofthe regular reference voltage. The control portion 9 outputs the regularreference voltage as is when outputting a select signal to the thirdaddress line 3C. Further, when the control portion 9 outputs the selectsignal to the fourth address line 3D, the reference voltage of the A/Dconverter 6 is set to substantially 90.0%, for example, of the regularreference voltage. Further, when the control portion 9 outputs theselect signal to the fifth address line 3E, the reference voltage of theA/D converter 6 is set to a reference voltage that is substantially67.5%, for example, of the regular reference voltage.

Each of the above proportions of the regular reference voltage aredecided in advance by assuming a case where there are five address lines3. In an actual area image sensor, the number of address lines 3 isgreater than in the above example and the values differ according to thenumber of address lines 3. In this embodiment, the ratio of thephotodiodes 1 that are connected to the first address line 3A, forexample, with respect to the maximum light amount of the light amount ata point on the vertical coordinate is 67.5% and this value is the valuelinked to the vertical correction coefficient.

Thus, when the control portion 9 sets a reference voltage for the A/Dconverter 6, a reference voltage the amplitude of which is reduced by apredetermined proportion is inputted as shown in FIG. 8 to the otherinput terminal 12 b of the comparator circuit 12 of the A/D converter 6.

Normally, the voltage value of the pixel signal from the photo diode 1that is held by the sample & hold circuit 11 is inputted to one inputterminal 12 a of the comparator circuit 12. Further, the comparatorcircuit 12 compares the reference voltage and the voltage value of thepixel signal and, when there is a match between the value of thereference voltage and the voltage value of the pixel signal, the matchsignal is outputted to the counter circuit 13. As a result, a countvalue C is counted by the counter circuit 13. The output of the countercircuit 13 is sent to the shift register 7 and is the regular outputvalue of the photodiode 1.

As detailed earlier, when a reference voltage the amplitude of which isreduced by a predetermined proportion is inputted to the comparatorcircuit 12, even when the same pixel signal is inputted, the timing atwhich there is a match between the value of the reference voltage andthe voltage value of the pixel signal is delayed. As a result, thecounter circuit 13 counts a count value C′ that is larger than the countvalue C and there is an apparent increase in the output value of thephotodiode 1.

On the other hand, when a case where a reference voltage is set for anA/D converter 6 in the X-axis direction (horizontal direction) in FIG.7, in the horizontal direction, the reference voltage that is suppliedto each A/D converter 6 differs as a result of voltage division by therespective resistors R1 to R8 of the voltage divider circuit 8 inaccordance with the value associated with the horizontal correctioncoefficient. That is, as shown in FIG. 5, a reference voltage that isvoltage-divided on the basis of the resistance ratio between the firstresistor R1 and second resistor R2 is supplied to the first A/Dconverter 6A. More specifically, the resistance ratio between the firstresistor R1 and second resistor R2 is 675:325, for example, and,therefore, a voltage of 67.5% of the regular reference voltage isinputted to the first A/D converter 6A as the reference voltage.

Further, because the resistance ratio between the third resistor R3 andfourth resistor R4 is 9:1, for example, a voltage that is 90% of theregular reference voltage is inputted as the reference voltage to thesecond A/D converter 6B. Because a resistance is not connected to thethird A/D converter 6C, the reference voltage amplified by the amplifier15 is inputted as is to the third A/D converter 6C. Further, because theresistance ratio between the fifth resistor R5 and sixth resistor R6 is9:1, for example, a voltage that is 90% of the regular reference voltageis inputted as the reference voltage to the fourth A/D converter 6D. Inaddition, because the resistance ratio between the seventh resistor R7and eighth resistor R8 is 675:325, for example, a voltage that is 67.5%of the regular reference voltage is inputted as the reference voltage tothe fifth A/D converter 6E.

Further, the respective proportions of the regular voltage of thedivided voltage ratios of the resistors are values that are decided inadvance by assuming a case where there are five read lines 4. In anactual area image sensor, the number of read lines 4 is greater than inthe above example and the values differ according to the number of readlines 4. In this embodiment, the ratio of the photodiodes 1 that areconnected to the first A/D converter 6A, for example, with respect tothe maximum light amount of the light amount at a point on thehorizontal coordinate is 67.5% and this value is the value linked to thehorizontal correction coefficient. Therefore, the ratio of thephotodiodes 1 that are connected to the first address line 3A and thefirst A/D converter 6A, with respect to the maximum light amount of thelight amount at a point in the image read area S is found by 67.5×67.5and is substantially 45.5%.

In a case where the reference voltage of the A/D converter 6 is set inthe vertical direction, the reference voltage (see FIG. 8) the amplitudeof which is reduced has the amplitude thereof further reduced byreducing, as mentioned earlier, the reference voltage that is suppliedto the first, second, fourth, and fifth A/D converters 6A, 6B, 6D, and6E respectively by a predetermined proportion by means of the voltagedivider circuit 8, as shown in FIG. 9. As a result, the comparatorcircuit 12 of the first A/D converter 6A, for example, compares thereference voltage with the further reduced amplitude and the pixelsignal.

Further, the match signal at this time is outputted to the countercircuit 13 and the counter circuit 13 outputs a count value C″ that ishigher than the count value C′ to the shift register 7. The output ofthe count circuit 13 is sent to the shift register 7 and constitutes theregular output value of the photodiode 1. However, because the countvalue C″ is a higher value than the count value C′, there is an apparentincrease in the output value of the photodiode 1.

Here, when the amplitude of the reference voltage is reduced by apredetermined proportion, although the count value (the output value ofthe photodiode 1) that is counted by the counter circuit 13 increases,in this case, the proportion of the increase in the count value has anexactly reciprocal number relationship with respect to the proportion ofthe reference voltage set for the A/D converter 6.

FIG. 10 shows the variation in the count value with respect to thevariation in the amplitude of the reference voltage. Further, FIG. 10shows, for the sake of expediency of the description, only the inclinedpart of the substantially saw-shaped waveform as a reference voltage andthe count range of this part being set at ‘1’ to ‘10’. Here, when a casewhere the amplitude of the reference voltage is reduced in theproportion 80% is assumed, the count value is a 1.25 multiple of from‘4’ to ‘5’, for example, and exactly matches (100/80), which is areciprocal number of a proportion of the regular reference voltage.

That is, in a case where the final output value of an optionalphotodiode 1 in the image read area S is the same as the output value ofa photodiode with a maximum received light amount, the ratio of thereceived light amount of the photodiode 1 on the horizontal coordinateaxis corresponding to the horizontal coordinate of the photodiode 1 withrespect to the maximum received light amount and the ratio of thereceived light amount of the photodiode 1 on the vertical coordinateaxis corresponding to the vertical coordinate of the photodiode 1 mayeach be set as the proportions of the reference voltage for the A/Dconverter 6.

In other words, setting the ratios for the A/D converter 6 asproportions of the reference voltage is equivalent to multiplying theoutput value of an optional photodiode 1 by the reciprocal number(horizontal correction coefficient) of the ratio of the received lightamount at a point on the horizontal coordinate axis corresponding to thehorizontal coordinate of the photodiode 1 with respect to the maximumreceived light amount and the reciprocal number (vertical correctioncoefficient) of the ratio of the received light amount at a point on thevertical coordinate axis corresponding to the vertical coordinate of thephotodiode 1 with respect to the maximum received light amount, wherebythe output value of the photodiode 1 can be corrected.

For example, as shown in FIG. 11, the ratio of the received light amountat a point on the horizontal coordinate axis corresponding to thehorizontal coordinate of the photodiode 1 with respect to the maximumreceived light amount is 67.5% for the photodiode 1 disposed in thefirst row and first column among the respective photodiodes 1 arrangedin five rows and five columns and the ratio of the received light amountat a point on the vertical coordinate axis corresponding to the verticalcoordinate of the photodiode 1 with respect to the maximum receivedlight amount is 67.5%. Therefore, the ratio of the received light amountat a point in which the photodiode 1 is located that is disposed in thefirst row and first column with respect to the maximum received lightamount is substantially 45.5%, as mentioned earlier.

As a result, if the received light amount at the point in which thephotodiode 1 disposed in the first row and first column is located ismultiplied by (100/67.5), which is the reciprocal number of the ratio ofthe received light amount at a point on the horizontal coordinate axiscorresponding to the horizontal coordinate of the photodiode 1 withrespect to the maximum received light amount, and by (100/67.5), whichis the reciprocal number of the ratio of the received light amount at apoint on the horizontal coordinate axis corresponding to the horizontalcoordinate of the photodiode 1 with respect to the maximum receivedlight amount, because 45.5×(100/67.5)×(100/67.5)=100, the output valueof the photodiode 1 can be corrected so as to be equal to the outputvalue of the photodiode 1 of the maximum received light amount.

Although, conventionally, a correction value is provided for the outputvalues of all the photodiodes 1 in the image read area S or for theoutput value of the photodiode 1 in one quadrant, in this embodiment,the output value of an optional photodiode 1 in the image read area Scan be easily corrected simply by a providing a correction coefficientfor each point located on the horizontal coordinate axis and each pointlocated on the vertical coordinate axis. The memory capacity cantherefore be easily reduced. Further, the output of the whole of theimage sensor may be reduced as in a case of using an ND filter.

Further, in addition to the circuit constitution shown in FIG. 5, theconstitution of the voltage divider circuit 8 may be a circuitconstitution in which the reference voltage supplied to the comparatorcircuit 12 of each of the A/D converters 6A to 6D is serially divided byresistors R11 to R16, as shown in FIG. 12.

That is, the third A/D converter 6C is serially connected to theamplifier 15 and the second A/D converter 6B is connected to theamplifier 15 via the resistor R13. Further, the first A/D converter 6Ais connected to the amplifier 15 via the resistors R12 and R13 and thefourth A/D converter 6D is connected to the amplifier 15 via theresistor R14. Further, the fifth A/D converter 6E is connected to theamplifier 15 via the resistors R14 and R15. One end of the resistor R11is connected to the resistor R12, while the other end is connected to apredetermined potential V₀. Further, one end of the resistor R16 isconnected to the resistor R15, while the other end is connected to thepredetermined potential V₀.

As a result of this constitution, the reference voltage that is suppliedto the respective A/D converters 6A, 6B, 6C, 6D, and 6E differsaccording to the values of each of the resistors R11 to R16 inaccordance with a value associated with the horizontal correctioncoefficient. More specifically, the reference voltage is inputted as isto the third A/D converter 6C and a voltage that is 90%, for example, ofthe regular reference voltage is inputted as the reference voltage tothe second and fourth A/D converters 6B and 6D respectively. Further, avoltage of 67.5%, for example, of the regular reference voltage, isinputted as the reference voltage to the first and fifth A/D converters6A and 6E respectively. Therefore, this constitution affords the sameoperating results as those of the circuit constitution shown in FIG. 5.

Further, in addition to providing this voltage divider circuit 8, thecount range (count addition value) of the counter circuit 13 of therespective A/D converters 6A to 6D may be set differently in accordancewith the value associated with the horizontal correction coefficient foreach of the A/D converters 6A to 6D, as shown in FIG. 13.

That is, although, in this embodiment, the counter circuit 13 countsbetween ‘0’ and ‘1023’, the counter circuits 13 may be such that onlythe counter circuit of the third A/D converter 6C counts between ‘0’ and‘1023’, while the counter circuit 13 of the second and fourth A/Dconverters 6B and 6D count between ‘0’ and ‘1138’, for example, and therespective counter circuits 13 of the first and fifth A/D converters 6Aand 6E respectively count between ‘0’ and ‘1517’, for example. Suchsetting and changing of count ranges can be performed easily by changingthe clock frequency that is inputted to the counter circuit 13.

Further, values indicating count ranges such as ‘1138’ and ‘1517’ arevalues that are determined beforehand by assuming a case where there arefive read lines 4.

As shown in FIG. 8, when the output values of the photodiodes 1 arrangedin the column direction are corrected for each row, the counter circuit13 counts the count value C′ in accordance with a match signal that isoutputted by the comparator circuit 12. Further, if the count range ofthe counter circuit 13 of the respective A/D converters 6A to 6D are setdifferently, one of the counter circuits 13 with a broad count range cancount a large value. Therefore, there is an apparent increase in theoutput value of the photodiode 1.

As a result, the same operating results as for the circuit constitutionin which the voltage divider circuit 8 was provided can be afforded and,as a result of being able to omit the voltage divider circuit 8, theproduct costs can be considerably reduced.

Further, the above correction method can also be applied to a case wherea DSP is installed in an area image sensor.

That is, conventionally, in a method that uses DSP, as shown in FIG. 14,all the output values that are read from all the photodiodes 1 are readfrom the memory 30 with the reciprocal number of the ratio of thereceived light amount at the point where the photodiode 1 is locatedwith respect to the maximum received light amount serving as thecorrection value and, by multiplying the output values by means of amultiplier 31, the light amount of the image read area S is renderedsubstantially uniform. In this method, the memory capacity is increasedbecause all the photodiodes 1 must have a correction value.

In this embodiment, as shown in FIG. 15, the horizontal correctioncoefficient corresponding to each point on the horizontal coordinateaxis that passes through the center of the image read area S and thevertical correction coefficient corresponding to each point on thevertical coordinate axis that passes through the center of the imageread area S are each stored in the memory 21.

Further, the actual output values of the photodiode 1 are multiplied bythe vertical correction coefficient corresponding with the horizontalcoordinate of the photodiode 1 by means of a multiplier 22 and by avertical correction coefficient that corresponds with the verticalcoordinate of the photodiode 1 by means of a multiplier 23.

Thus, because only the horizontal correction coefficient and verticalcorrection coefficient need be stored, in comparison with a case whereall the photodiodes 1 have their respective correction values, not onlycan the memory capacity be markedly reduced, a reduction in the productcost can be achieved. Moreover, greater results are exhibited as thenumber of pixels increases.

Further, the method for multiplying the correction coefficients may be amethod in which, as shown in FIG. 16, the horizontal correctioncoefficient corresponding with the horizontal coordinate of thephotodiode 1 and the vertical correction coefficient corresponding withthe vertical coordinate are multiplied beforehand by the multiplier 24and then the multiplication result is then multiplied by the actualoutput value of the photodiode 1 by means of a multiplier 25.

Further, the horizontal correction coefficient and vertical correctioncoefficient may be stored as data that is thinned out beforehand. Thatis, one correction coefficient is stored in the memory for each of aplurality of columns and one correction coefficient is stored for eachof a plurality of rows. As a result, the memory capacity can be furtherreduced.

Further, the first embodiment above improves degradation of the imagequality of the pickup image based on the non-uniformity of the lightamount of the subject optical image that is focused on the imaging face.However, a second embodiment that improves image distortion that isproduced as a result of performing the exposure operation by providing atime difference for each row will be described next.

In the case of the CMOS area image sensor according to the secondembodiment, the constitution of each pixel is different from that of theCMOS area image sensor according to the first embodiment and theexposure control method is different based on this difference inconstitution.

Therefore, in the following description, the pixel constitution andexposure control of the MOS-type area image sensor according to thesecond embodiment will be described.

FIG. 17 is a circuit diagram showing the constitution corresponding toone pixel of the CMOS area image sensor according to the secondembodiment.

Each pixel of the CMOS area image sensor of the second embodiment isconstituted by a photodiode 10 and a switching circuit 20 that isconnected to the photodiode 10. The photodiode 10 corresponds to thephotodiode 1 of the area image sensor according to the first embodimentabove.

The switching circuit 20 is constituted by a transfer transistor TRt, acapacitor C, a reset transistor TRr, an amplification transistor TRa,and a select transistor TRs. The select transistor TRs, reset transistorTRr, and amplification transistor TRa each correspond to the selecttransistor 2 a, reset transistor 2 c, and amplification transistor 2 bthat constitute the switching circuit 2 of the area image sensor of thefirst embodiment above. The capacitor C temporarily holds the electricalcharge that has accumulated in the phototransistor 10 as a result of anexposure operation. Further, the transfer transistor TRt is a switchingelement for controlling the transfer of electrical charge that hasaccumulated in the photo transistor 10 to the capacitor C.

The cathode (output terminal) of the photodiode 10 is connected to thesource (input terminal) of the transfer transistor TRt and the anodethereof is grounded. The transfer transistor TRt consists of anN-channel junction-type FET (Field Effect Transistor), the drain (outputterminal) thereof being connected to the main electrode of the capacitorC, and the gate thereof being connected to a transfer control line T.The transfer control line T is a signal line for inputting a controlsignal for controlling the ON/OFF of the transfer transistor TRt and,similarly to the address lines 3, a plurality of the transfer controllines T are provided in correspondence with the plurality of pixelsarranged in each row and are each connected to the control portion 9.

The main electrode of the capacitor C is connected to the connectionpoint P1 between the source (input terminal) of the reset transistor TRrand the gate of the amplification transistor TRa, and the otherelectrode of the capacitor C is grounded. The reset transistor TRrconsists of an N-channel junction-type FET, the gate of which isconnected to the reset line R. The amplification transistor TRa consistsof a P-channel junction-type FET, the drain of which is connected to theaddress line B, and the source (output terminal) of which is connectedto the drain of the select transistor TRs. The select transistor TRsconsists of a P-channel junction-type FET, the source (output terminal)thereof being connected to the signal line L and the gate thereof beingconnected to the address line A.

When a control signal (referred to as a ‘transfer signal’ hereinbelow)is inputted by the control portion 9 via the transfer control line T,the transfer transistor TRt is switched ON and the electrical chargethat has accumulated in the photodiode 10 is transferred to thecapacitor C. Therefore, implementation of the exposure is such that theexposure is started at a time when the transfer transistor TRt isswitched from ON to OFF (exposure start time) and, when the transfertransistor TRt is then turned from OFF to ON (exposure end time) theelectrical charge that has accumulated in the photodiode 10 thus far isall transferred to the capacitor C.

While the reset transistor TRr is OFF when the reset signal is inputtedfrom the control portion 9 via the reset line R, the pixel signal isfree to move from the connection point P1 to the amplificationtransistor TRa. Conversely, when the reset transistor TRr is switchedON, the electrical charge that has accumulated in the capacitor C isdischarged to the outside via the connection point P1 and the resettransistor TRr. That is, when the reset transistor TRr is turned on, theresidual electrical charge in the capacitor C is discharged (reset) tooutside the circuit and the residual electrical charge (electricalcharge that has accumulated as a result of the exposure operation) canbe transferred from the photodiode 10 to the capacitor C.

The amplification transistor TRa functions as a source follower. Theamplification transistor TRa amplifies the pixel signal (voltage of thecapacitor C) inputted to the gate and outputs the amplified pixel signalto the switching transistor TRs. When a select signal is inputted by thecontrol portion 9 via the address line A, the select transistor TRs isswitched ON and causes the amplification transistor TRa to operate. Thatis, when the select transistor TRs is switched ON, the amplified pixelsignal is outputted by the amplification transistor TRa and outputted tothe signal line L via the select transistor TRs. The pixel signal isinputted to the A/D converter 6 via the signal line L.

As mentioned earlier, the A/D converter 6 converts a pixel signalconstituting an analog signal to digital image data and outputs same insync with a select signal (horizontal synchronization signal). Theselect transistor TRs turns ON in sync with the select signal and thepixel signal that is outputted by the amplification transistor TRa(signal rendered by amplifying the pixel signal based on the electricalcharge that has accumulated in the capacitor C) is inputted to the A/Dconverter 6 via the signal line L. Therefore, the A/D conversionoperation of the A/D converter 6 is performed each time the pixel signalis read in each row. Further, the pixel data that is generated by theA/D converter 6 in each row is transferred to frame memory sequentiallyvia the shift register 7.

As mentioned earlier, the control portion 9 controls the output of theselect signal to the respective address lines 3, the output of the resetsignal to the respective reset lines R, and the output of the transfersignal to the respective transfer control lines T. The control portion 9controls the output timing of the output of the select signal, resetsignal, and transfer signal on the basis of a vertical synchronizationsignal and a horizontal synchronization signal.

The select signal is a signal for selecting the row from which the pixelsignals are to be read and is outputted sequentially from the uppermostrow to the lowermost row in sync with the horizontal synchronizationsignal. In the plurality of pixels arranged in the row to which theselect signal is outputted, the select transistors TRs are switched ONat the same time and the pixel signals are outputted to the A/Dconverter 6 via the signal line L.

The reset signal is a signal for discharging electrical charge that hasaccumulated in the capacitor C and is a high-level pulse signal, forexample. The transfer signal is a signal for controlling the transfer ofthe accumulated electrical charge in the photodiode 10 to the capacitorC and is substantially a signal for controlling the exposure operationof the photodiode 10. When a high-level transfer signal is outputted tothe transfer control line T, in the plurality of pixels arranged in therow corresponding with the transfer control line T, the transfertransistors TRt turn ON at the same time and the electrical charge thathas accumulated as a result of the exposure operation of the photodiode10 is transferred to the capacitor C. Thereafter, when a low-leveltransfer signal is outputted to the transfer control line T, in theplurality of pixels arranged in the row corresponding with the transfercontrol line T, the transfer transistors TRt turn OFF at the same timeand, with the timing at which the transfer signal is inverted from thehigh level to the low level, the transfer of electrical charge from thephotodiode 10 to the capacitor C is prohibited and exposure is started.

Because the electrical charge that has accumulated in the photodiode 10as a result of the exposure operation is transferred to the capacitor Cafter the capacitor C is reset, the transfer signal is outputted at thesame time as or after the reset signal.

In the case of the CMOS area image sensor of the second embodiment, theelectrical charge that has accumulated in the photodiode 10 istransferred to the capacitor C and temporarily saved. Hence, theexposure operation of the photodiode 10 and the operation to read theaccumulated electrical charge can be separated.

The above-mentioned conventional CMOS area image sensor and the CMOSarea image sensor of the first embodiment are constituted such thataccumulated electrical charge of the photodiode 10 is read immediatelywhen exposure ends and the next exposure operation is started at thesame time. Therefore, when the exposure start/end timings of all thepixels are the same, pixel signals are outputted to each signal line Lby the plurality of pixels arranged in a vertical direction in thecorresponding column and these pixel signals are mixed and inputted tothe A/D converter 6. Hence, there has been a need to shift the exposurestart/end timing of the pixels in row units. As a result, there has beena shift in the exposure time in row units on the imaging screen and, inthe case of a moving body that is moving at high speed, image distortionhas resulted.

In the case of the CMOS area image sensor of the second embodiment, theexposure operation of the photodiode 10 and the operation to read theaccumulated electrical charge thereof can be separated. Therefore, ifthe exposure operation of all the pixels is controlled at the same timeand the timing is shifted in row units during the operation to readaccumulated charge, the received light signals of all the pixels can beread accurately in the same way as the prior art.

The exposure operation of the CMOS area image sensor of the secondembodiment will be described next.

FIGS. 18 to 20 are time charts showing operation timing when a movingimage is inputted. More particularly, FIG. 18 is a normal input mode inwhich the exposure timing is shifted one row at a time in the same wayas the prior art; FIG. 19 shows a global shutter input mode with arelatively short exposure time with the same exposure timing for all thepixels; and FIG. 20 shows a global shutter input mode with a relativelylong exposure time with the same exposure timing for all the pixels.Each figure shows the operation timing for the second and third rowscorresponding to two address lines A2 and A3. Such operation timing isalso applied in the same manner in other rows. Further, the normal inputmode in FIG. 18 is merely a comparative example and, in reality, such anoperation mode is not adopted.

In the normal input mode, as shown in FIG. 18, when the time from when avertical synchronization signal is inputted until the next verticalsynchronization signal is inputted is one cycle, the control portion 9writes an address value indicating the select scanning order of therespective address lines A1 to A6 to an address counter in sync with thehorizontal synchronization signal during this one cycle. One cycle ofthe vertical synchronization signal corresponds to one frame of imagedata. Further, one cycle of the horizontal synchronization signalcorresponds to one row's worth of signal processing time.

For example, the control portion 9 reads the address value ‘A2’ from theaddress counter and, until the address value ‘A2’ is read again, thephotodiode 10 of the second row is in the exposure state (charging).Further, the address value ‘A3’ is read from the address counter and,until the address value ‘A3’ is read again, the photodiode 10 of thethird row is in the exposure state. The pixel signals of the second andthird rows resulting from this exposure form part of the first frame(1F).

Further, the control portion 9 outputs a transfer signal to the transfercontrol line T of the second row at the time the address value ‘A2’ isread. Further, the control portion 9 outputs a transfer signal to thetransfer control line T of the third row at the time the address value‘A3’ is read. As a result, in the second row, the pixel signal of thephotodiode 10 is transferred to the capacitor C via the transfertransistor TRt and, so too in the third row, the pixel signal of thephotodiode 10 is similarly transferred to the capacitor C delayed by onecycle of the horizontal synchronization signal.

Thereupon, in each row, the reset signal on the reset line R is at thelow level in accordance with the transmission timing of the transfersignal (the timing with which the transfer transistor TRt is turned ON).Further, a high-level select signal is outputted to the respectiveaddress lines A2 and A3 immediately after the reset signal goes low ineach row. As a result, a pixel signal is accumulated in the capacitor Cin each row (charge) and, immediately thereafter, the pixel signal isinputted to the amplification transistor TRa with the transmissiontiming of the select signal (timing at which the select transistor TRsis turned ON) and is amplified and the amplified pixel signal isoutputted to the A/D converter 6 via the select transistor TRs andsignal line L.

Further, a pixel signal is converted into digital image data within thetime of one cycle of the horizontal synchronization signal by the A/Dconverter 6. In addition, the image data is outputted to the framememory as one row's worth of serial data by the shift register 7 withinthe same cycle time. By repeating this series of operations in row unitsand in frame units, a plurality of frames' worth of consecutive imagedata, that is, a moving image is obtained.

Further, in the normal input mode, as is clear from FIG. 18, because theexposure of a plurality of pixels arranged in each row is sequentiallystarted in sync with the horizontal synchronization signal, the exposurestart timing is different each time. As a result, the exposure time isthe same. However, because the frame image is constituted by pixelsignals with different exposure times in each row, when the photographicsubject moves, distortion is produced in the frame image. As a result,the global shutter input mode described below is actually adopted.

First, a global shutter input mode of a short exposure system will bedescribed.

As shown in FIG. 19, in the case of the global shutter input mode of ashort exposure system, the control portion 9 instantly sends all thehigh-level reset signals on the reset lines R, . . . at the same time ofall rows in accordance with the input of the trigger signal. At the sametime, the control portion 9 sends all the transfer signals consisting ofpulse signals that rise to the high level instantly on the transfercontrol lines T, . . . of all the rows (see timing a). Thereupon, theelectrical charge that has accumulated in the photodiodes 10 andcapacitors C in all the pixels is discharged to the outside via thereset transistors TRr, . . . , whereupon the photodiode 10 and capacitorC are reset, and exposure is started.

Thereafter, the control portion 9 instantly sends all the high-leveltransfer signals immediately before the vertical synchronization signalis inputted (see timing b). As a result, the transfer transistor TRt isOFF for a short time (the time from timing a to timing b) and thephotodiodes 10 of all the pixels are in the exposure state at the sametime over this interval. Further, in all the pixels, the electricalcharge that has accumulated in accordance with the received light amountin the capacitors C, . . . is transferred via the transfer transistorTRt from the photodiodes 10, . . . at the point where all the transfersignals are resent (timing b) (see the capacitor charge of A2 and A3 inFIG. 18), and the charge that has accumulated in these capacitors C isin a temporarily accumulated state.

Thereafter, the control portion 9 sends a select signal to the addressline A for each single row in sync with the horizontal synchronizationsignal (see the horizontal synchronization signal in FIG. 19 and theaddress select signal of A2 and A3). Thereupon, in the plurality ofpixels that are arranged in each row, the pixel signals are amplified bythe amplification transistor TRa on the basis of the electrical chargeresulting from the simultaneous exposure of all the pixels that hasaccumulated in the capacitor C and then outputted to the signal line Lvia the select transistor TRs. Thereafter, the pixel signals of each roware converted to digital signals by the A/D converter 6 (see A/Dconversion in FIG. 19) and then transferred to the frame memory via theshift register 7. Further, image data corresponding to one frame isstored in the frame memory by performing this operation for all therows. In addition, image data for a moving image is obtained byrepeating the generation of the image data for each single frame.

In short, in global shutter input mode of a short exposure system, ascan be seen from FIG. 19, an exposure operation is performed at the sametime for all the pixels in a relatively short exposure time and,immediately afterward, the electrical charge that has accumulated in thephotodiode 10 is transferred at once to the capacitor C to afford thephotodiode 10 an exposure-capable state, whereas the accumulatedelectrical charge that is temporarily saved in the capacitor C issequentially read in row units in sync with the horizontalsynchronization signal, converted to image data of a digital signal bythe A/D converter 6, and then stored to the frame memory via the shiftregister 7. Therefore, a pickup image without image distortion can beobtained even when the photographic subject is a moving object.

The global shutter input mode of a long exposure system will bedescribed next.

As shown in FIG. 20, in the global shutter input mode of a long exposuresystem, the control portion 9 instantly sends all the reset signals andall the transfer signals of a high level to all of the reset lines R, .. . and transfer control lines T, . . . respectively at the same timeimmediately before the vertical synchronization signal is inputted (seetiming a). Thereupon, the electrical charge that has accumulated in thephotodiodes 10, . . . and capacitors C, . . . in all the pixels isdischarged to the outside via the reset transistors TRr, . . . , thephotodiodes 10, . . . and capacitors C, . . . are reset, and exposure isstarted.

Thereafter, the control portion 9 does not send all the reset signalsand all the transfer signals until immediately before the next verticalsynchronization signal is inputted (not shown in FIG. 20). As a result,the transfer transistor TRt is OFF for a long time that corresponds tothe cycle of the vertical synchronization signal (corresponds to thecapture time of one frame's worth of image data) and the photodiodes 10,. . . of all the pixels are afforded an exposure state at the same timeover this interval.

Further, the control portion 9 sends a select signal to the address lineA for each single row in sync with the horizontal synchronization signalwhile an exposure operation is performed for all the pixels (see theaddress select signal of A2 and A3 and the horizontal synchronizationsignal in FIG. 20). In the plurality of pixels arranged in each row, thepixel signals are amplified by the amplification transistor TRa on thebasis of the electrical charge resulting from the previous simultaneousexposure of all the pixels that has accumulated in the capacitor C andoutputted to the signal line L via the select transistor TRs.Thereafter, the pixel signals of each row are converted to digitalsignals by the A/D converter 6 (see A/D conversion in FIG. 20) and thentransferred to the frame memory via the shift register 7. Further, oneframe's worth of image data is stored in the frame memory by performingthis operation for all the rows.

That is, in the global shutter input mode of a long exposure system,while exposure of a time corresponding to the cycle of the verticalsynchronization signal is performed at the same time for all the pixels,the electrical charge corresponding with the received light amountobtained in the previous simultaneous exposure of all the pixels issequentially read to the A/D converter 6 in row units from the capacitorC of each pixel and converted to digital image data before being storedin the frame memory via the shift register 7. Therefore, in the globalshutter input mode of a long exposure system, there is no imagedistortion even when the photographic subject is a moving object and anadequate pickup image can be obtained also from the perspective ofclarity.

In the case of a conventional CMOS area image sensor, the exposureoperation for each pixel is controlled by shifting the exposure starttiming in row units. Therefore, in order to reduce the temporal shift ofeach row as much as possible in order to suppress image distortion, thespeed of the A/D conversion and so forth can also be further increasedby raising the frequency (clock frequency) of the horizontalsynchronization signal. However, in so doing, although there is theinconvenience that the electrical power consumption of the A/D converter6 and so forth increases, with the CMOS area image sensor according tothe second embodiment, the exposure operation of all the pixels can beperformed at the same time. Therefore, there is no need to increase theclock frequency and the inconvenience of increased electrical powerconsumption is not produced.

A modified example of the CMOS area image sensor according to the secondembodiment will be described next. Further, a description of the samepoints as those of the second embodiment is omitted here by assigningthe same reference numerals.

FIG. 21 is a circuit diagram showing a constitution corresponding to onepixel of a modified example of a CMOS area image sensor of the secondembodiment.

In the modified example, two sets of a set that connects the outputterminal (drain) of the transfer transistor TRt and the main electrodeof the capacitor C are provided between photodiode 10 and the connectionpoint P1 are provided. That is, the capacitor for temporarily holdingthe accumulated electrical charge of the photodiode 10 is constituted intwo stages.

As shown by the blocks K1 and K2 circled by virtual lines in FIG. 21,when the block K1 close to the photodiode 10 is the first set and thefarthest block K2 is the second set, the source of the transfertransistor TRt1 of the first set is connected to the cathode of thephotodiode 10 and the drain is connected to the source of the transfertransistor TRt2 and to the main electrode of the capacitor C1 of thesecond set, while the gate is connected to the first transfer controlline T1. Further, the drain of the transfer transistor TRt2 of thesecond set is connected to the connection point P1 and the gate of thetransfer transistor TRt2 is connected to the second transfer controlline T2.

Further, a reset transistor for the photodiode 10 is provided separatelyfrom the reset transistor for the capacitor of the second set. Supposingthat the latter is the first reset transistor TRt1 and the former is thesecond reset transistor TRt2, the source of the first reset transistorTRt1 is connected to the output terminal (cathode) of the photodiode 10and the gate is connected to the first reset line R1. Further, thesource of the second reset transistor TRt2 is connected to theconnection point P1 and the gate is connected to the second reset lineR2.

The exposure operation of the modified example of the CMOS area imagesensor will be described next.

FIG. 22 is a time chart showing the operation timing during the input ofa moving image of a modified example. The time chart is a time chart ofthe global shutter input mode. Further, the operation timing for thesecond and third rows that correspond to the two address lines A2 and A3is shown. Such operation timing is applied similarly in the other rows.

In the global shutter input mode of the modified example, the controlportion 9 instantly sends a first reset signal of a high level on thefirst reset line R1 at the same time for all the rows with the sametiming as the timing shown in FIG. 19. At the same time, the controlportion 9 instantly sends a first transfer signal of a high level on thefirst transfer control line T1 for all the rows. Thereupon, exposure isstarted at the same time for the photodiodes 10, . . . of all the pixels(see timing a and b).

Thereafter, the control portion 9 instantly sends the first transfersignal of a high level immediately before inputting the verticalsynchronization signal (see timing c and d). As a result, the transfertransistor TRt1 of a first set is turned OFF for a short time and thephotodiodes 10, of all the pixels are afforded an exposure state at thesame time over this interval. Further, for all the pixels, the pixelsignals are transferred from the photodiodes 10, . . . to the capacitorsC1, . . . of the same set via the transfer transistor TRt1 of the firstset at the point (see timing c, d) the first transfer signal is resent,and a state where the pixel signals are temporarily stored in thecapacitors C1, . . . is established.

Thereafter, the control portion 9 outputs a second transfer signal tothe second transfer control line T2 of the second row at the point wherethe address value ‘A2’ is read from the address counter, for example.Further, the control portion 9 sends the second transfer signal to thesecond transfer control line T2 of the third row at the point where theaddress value ‘A3’ is read from the address counter. As a result, in thesecond row, the electrical charge (pixel signal) that has accumulated inthe capacitor C1 of the first set is transferred to the capacitor C2 ofthe second set via the transfer transistor TRt2 of the second set and,so too for the third row with a delay of one cycle of the horizontalsynchronization signal, electrical charge (pixel signal) that hasaccumulated in the capacitor C1 of the first set is similarlytransferred to the capacitor C2 of the second set.

Here, in each row, the second reset signal on the second reset line R2is afforded a low level in accordance with the timing for sending thesecond transfer signal (timing at which the transfer transistor TRt2 ofthe second set is turned ON). Further, immediately after the secondreset signal is afforded a low level in each row, a high-level selectsignal is outputted to the respective address lines A2 and A3. As aresult, in each row, electrical charge is accumulated (charge) in thecapacitor C2 of the second set and, immediately afterward, the pixelsignal is amplified as a result of being inputted to the amplificationtransistor TRa with the timing for sending the select signal (timing atwhich the switching transistor TRs is turned ON) and the amplified pixelsignal is outputted to the A/D converter 6 via the select transistor TRsand signal line L.

Further, the pixel signal is converted to digital image data in the timeof one cycle of the horizontal synchronization signal by the A/Dconverter 6. In addition, the image data is outputted to the framememory as one row's worth of serial data by the shift register 7 in thesame single-cycle time. By repeating this series of operations in rowunits and in frame units, a plurality of frames' worth of consecutiveimage data, that is, a moving image, is obtained.

In short, in global shutter input mode of the modified example, as canbe seen from FIG. 22, an exposure operation is performed at the sametime for all the pixels and, immediately afterward, the electricalcharge that has accumulated in the photodiode 10 is transferred at onceto the capacitor C1 to afford the photodiode 10 an exposure-capablestate, whereas the accumulated electrical charge that is temporarilysaved in the capacitor C1 is sequentially read while being transferredto the capacitor C2 of the second set in row units in sync with thehorizontal synchronization signal (see the read processing of the pixelsignal of the second row of the period e in FIG. 22), converted to imagedata of a digital signal by the A/D converter 6, and then stored to theframe memory via the shift register 7. Therefore, similarly to the CMOSarea image sensor according to the second embodiment, a pickup imagewithout image distortion can be obtained even when the photographicsubject is a moving object.

Further, the results of each of the above embodiments are particularlyeffective when a moving image is displayed on the liquid-crystal monitorof the digital camera and when moving image data is captured in arecordable memory or the like, for example.

Further, the area image sensor 1 may be any of a color image sensor or amonochrome image sensor. Further, pixel placement is not limited to alattice shape and may be an arrangement such as a honeycomb structure,for example.

The control portion 9 may scan the address lines A, alternately, forexample. In such a case, the data amount can be reduced by increasingthe frame rate.

A variety of modifications is possible relative to other points withinthe scope of the present invention. For example, the number ofcapacitors C and the number of transfer transistors TRt per pixel mayeach be three or more.

Moreover, the present invention is not limited to the embodiments above.The area image sensor 1 is not limited to a digital camera and can alsobe applied to a digital video camera and a portable-type phone with aphotographic function or the like, for example, and can be appliedwidely to industrial scanning devices and so forth.

1. An area image sensor comprising a plurality of pixels arranged in alattice shape on an imaging face for photoelectrically converting lightof a subject optical image that is focused on the imaging face via animaging optical system into an electrical signal in each pixel andoutputting the electrical signal, each pixel comprising: a photoelectricconversion element that converts light rendered through exposure byaccumulating electrical charge in accordance with a received lightamount into an electrical signal; a select transistor for outputting tothe outside accumulated electrical charge from the photoelectricconversion element following the end of exposure; one or two or moreelectrical charge holding circuits provided between the photoelectricconversion element and the select transistor that comprise a capacitorfor temporarily holding electrical charge that has accumulated as aresult of exposure from the photoelectric conversion element and atransfer transistor for controlling the transfer of the accumulatedelectrical charge of the photoelectric conversion element to thecapacitor; and a reset transistor provided between the select transistorand the electrical charge holding circuit for discharging residualelectrical charge of the capacitor prior to the start of exposure,wherein, while determining a horizontal correction coefficient forcorrecting the level of a photoelectric conversion signal that isoutputted from the pixels corresponding with each point located on ahorizontal coordinate axis that passes through a predetermined point ofthe image read area in the imaging face and a vertical correctioncoefficient for correcting the level of a photoelectric conversionsignal that is outputted from the pixels corresponding with each pointlocated on a vertical coordinate axis that passes through apredetermined point of the image read area in the imaging face, thelevel of the photoelectric conversion signal of each pixel is correctedby multiplying the photoelectric conversion signal that is outputted byeach pixel in the image read area by the horizontal correctioncoefficient corresponding with the horizontal coordinate of each pixeland by the vertical correction coefficient that corresponds with thevertical coordinate.
 2. An area image sensor comprising a plurality ofpixels arranged in a lattice shape on an imaging face forphotoelectrically converting light of a subject optical image that isfocused on the imaging face via an imaging optical system into anelectrical signal in each pixel and outputting the electrical signal,each pixel comprising: a photoelectric conversion element that convertslight rendered through exposure by accumulating electrical charge inaccordance with a received light amount into an electrical signal; aselect transistor for outputting to the outside accumulated electricalcharge from the photoelectric conversion element following the end ofexposure; one or two or more electrical charge holding circuits providedbetween the photoelectric conversion element and the select transistorthat comprise a capacitor for temporarily holding electrical charge thathas accumulated as a result of exposure from the photoelectricconversion element and a transfer transistor for controlling thetransfer of the accumulated electrical charge of the photoelectricconversion element to the capacitor; and a reset transistor providedbetween the select transistor and the electrical charge holding circuitfor discharging residual electrical charge of the capacitor prior to thestart of exposure.
 3. The area image sensor according to claim 1,wherein the electrical charge accumulation circuit has a constitution inwhich one electrode of the capacitor is connected to the output terminalof the transfer transistor and the other electrode is grounded; and theinput terminal of the transfer transistor is connected to thephotoelectric conversion element side and one electrode of the capacitoris connected to the reset transistor side.
 4. The area image sensoraccording to claim 1, wherein, in each pixel, two of the electricalcharge holding circuits are connected in series between thephotoelectric conversion element and the select transistor, and a secondreset transistor for discharging residual electrical charge of thephotoelectric conversion element prior to the start of exposure isconnected to the input terminal of the photoelectric conversion element.5. The area image sensor according to claim 1, wherein a plurality ofsignal lines for outputting photoelectric conversion signals from aplurality of pixels arranged in each column is provided in each column;a plurality of transfer control lines, reset lines, and address lines,which serve to control the ON/OFF of the transfer transistor, the resettransistor and the select transistor respectively of a plurality ofpixels arranged in each row, are provided in each row; and thesimultaneous exposure of all the pixels is started by simultaneouslyoutputting reset signals and transfer signals to all of the reset linesand all of the transfer control lines respectively and the simultaneousexposure of all the pixels is subsequently terminated by outputting thetransfer signals once again to all of the transfer control lines when apredetermined exposure time has elapsed, whereupon photoelectricconversion signals resulting from the simultaneous exposure of all thepixels are simultaneously outputted to each row from the plurality ofpixels arranged in each row by sequentially outputting select signals tothe address lines of each row in sync with a plurality of horizontalsynchronization signals outputted in sync with a verticalsynchronization signal.
 6. The area image sensor according to claim 1,wherein a plurality of signal lines for outputting photoelectricconversion signals from a plurality of pixels arranged in each column isprovided in each column; a plurality of transfer control lines, resetlines, and address lines, which serve to control the ON/OFF of thetransfer transistor, the reset transistor and the select transistorrespectively of a plurality of pixels arranged in each row, are providedin each row; and simultaneous exposure of all the pixels of a time thatcorresponds to the cycle of a vertical synchronization signal isrepeated by simultaneously outputting a reset signal and transfer signalto all of the reset lines and all of the transfer control linesrespectively in sync with the vertical synchronization signal, andphotoelectric conversion signals resulting from the simultaneousexposure of all the pixels of one exposure period earlier aresimultaneously outputted to each row from the plurality of pixelsarranged in each row by sequentially outputting select signals to theaddress lines of each row in sync with a plurality of horizontalsynchronization signals outputted in sync with a verticalsynchronization signal during each exposure period.
 7. An area imagesensor comprising a plurality of pixels arranged in a lattice shape onan imaging face for photoelectrically converting light of a subjectoptical image that is focused on the imaging face via an imaging opticalsystem into an electrical signal in each pixel and outputting theelectrical signal, wherein, while determining a horizontal correctioncoefficient for correcting the level of a photoelectric conversionsignal that is outputted from the pixels corresponding with each pointlocated on a horizontal coordinate axis that passes through apredetermined point of the image read area in the imaging face and avertical correction coefficient for correcting the level of aphotoelectric conversion signal that is outputted from the pixelscorresponding with each point located on a vertical coordinate axis thatpasses through a predetermined point of the image read area in theimaging face, the level of the photoelectric conversion signal of eachpixel is corrected by multiplying the photoelectric conversion signalthat is outputted by each pixel in the image read area by the horizontalcorrection coefficient corresponding with the horizontal coordinate ofeach pixel and by the vertical correction coefficient that correspondswith the vertical coordinate.
 8. The area image sensor according toclaim 1, wherein a predetermined point of the image read area is thepoint where the pixel for which a reference received light amount fromthe imaging optical system is maximum is located.
 9. The area imagesensor according to claim 1, wherein the horizontal correctioncoefficient is determined on the basis of the reciprocal number of theratio of a reference received light amount of each pixel arranged on thehorizontal coordinate axis that passes through the predetermined pointwith respect to the reference received light amount of the pixel locatedat the predetermined point; and the vertical correction coefficient isdetermined on the basis of the reciprocal number of the ratio of thereference received light amount of each pixel arranged on the verticalcoordinate axis that passes through the predetermined point with respectto the reference received light amount of the pixel located at thepredetermined point.
 10. The area image sensor according to claim 1,comprising: a plurality of A/D conversion means provided in each columnthat perform conversion to a digital signal by comparing the level of ananalog photoelectric conversion signal that is outputted by a pluralityof pixels arranged in each column with a predetermined reference level;first reference level setting means that set, for the A/D conversionmeans, a different reference level for each row in accordance with avalue that is associated with the vertical correction coefficient when aphotoelectric conversion signal is outputted by a plurality of pixelsarranged in each row in row units; and second reference level settingmeans that set, for each of the A/D conversion means, a differentreference level in accordance with a value that is associated with thehorizontal correction coefficient.
 11. The area image sensor accordingto claim 10, wherein the horizontal setting means set a differentreference level for each of the A/D conversion means by dividing thereference voltage by means of resistors.
 12. The area image sensoraccording to claim 1, comprising: a plurality of A/D conversion meansprovided in each column that perform conversion to a digital signal bycomparing the level of an analog photoelectric conversion signal that isoutputted by a plurality of pixels arranged in each column with apredetermined reference level; first reference level setting means thatset, for the A/D conversion means, a different reference level for eachrow in accordance with a value that is associated with the verticalcorrection coefficient when an analog signal is outputted by a pluralityof pixels arranged in each row in row units; and second reference levelsetting means that count the output of each of the A/D conversion meanswith a predetermined count range serving as a reference and set adifferent count range for each of the A/D conversion means in accordancewith a value that is associated with the horizontal correctioncoefficient.
 13. The area image sensor according to claim 1, comprising:horizontal correction coefficient storage means that pre-store ahorizontal correction coefficient corresponding with each point locatedon a horizontal coordinate axis that passes through a predeterminedpoint of the image read area; vertical correction coefficient storagemeans that pre-store a vertical correction coefficient correspondingwith each point located on a vertical coordinate axis that passesthrough a predetermined point of the image read area; and multiplicationmeans that multiply a photoelectric conversion signal that is outputtedby each pixel in the image read area by a horizontal correctioncoefficient corresponding with a horizontal coordinate of the pixel thatis stored in the horizontal correction coefficient storage means and bya vertical correction coefficient corresponding with a verticalcoordinate of the pixel that is stored in the vertical correctioncoefficient storage means.
 14. The area image sensor according to claim13, wherein the horizontal correction coefficient storage means storethe horizontal correction coefficient by thinning the horizontalcorrection coefficient; and the vertical correction coefficient storagemeans store the vertical correction coefficient by thinning the verticalcorrection coefficient.
 15. The area image sensor according to claim 2,wherein the electrical charge accumulation circuit has a constitution inwhich one electrode of the capacitor is connected to the output terminalof the transfer transistor and the other electrode is grounded; and theinput terminal of the transfer transistor is connected to thephotoelectric conversion element side and one electrode of the capacitoris connected to the reset transistor side.
 16. The area image sensoraccording to claim 2, wherein, in each pixel, two of the electricalcharge holding circuits are connected in series between thephotoelectric conversion element and the select transistor, and a secondreset transistor for discharging residual electrical charge of thephotoelectric conversion element prior to the start of exposure isconnected to the input terminal of the photoelectric conversion element.17. The area image sensor according to claim 2, wherein a plurality ofsignal lines for outputting photoelectric conversion signals from aplurality of pixels arranged in each column is provided in each column;a plurality of transfer control lines, reset lines, and address lines,which serve to control the ON/OFF of the transfer transistor, the resettransistor and the select transistor respectively of a plurality ofpixels arranged in each row, are provided in each row; and thesimultaneous exposure of all the pixels is started by simultaneouslyoutputting reset signals and transfer signals to all of the reset linesand all of the transfer control lines respectively and the simultaneousexposure of all the pixels is subsequently terminated by outputting thetransfer signals once again to all of the transfer control lines when apredetermined exposure time has elapsed, whereupon photoelectricconversion signals resulting from the simultaneous exposure of all thepixels are simultaneously outputted to each row from the plurality ofpixels arranged in each row by sequentially outputting select signals tothe address lines of each row in sync with a plurality of horizontalsynchronization signals outputted in sync with a verticalsynchronization signal.
 18. The area image sensor according to claim 2,wherein a plurality of signal lines for outputting photoelectricconversion signals from a plurality of pixels arranged in each column isprovided in each column; a plurality of transfer control lines, resetlines, and address lines, which serve to control the ON/OFF of thetransfer transistor, the reset transistor and the select transistorrespectively of a plurality of pixels arranged in each row, are providedin each row; and simultaneous exposure of all the pixels of a time thatcorresponds to the cycle of a vertical synchronization signal isrepeated by simultaneously outputting a reset signal and transfer signalto all of the reset lines and all of the transfer control linesrespectively in sync with the vertical synchronization signal, andphotoelectric conversion signals resulting from the simultaneousexposure of all the pixels of one exposure period earlier aresimultaneously outputted to each row from the plurality of pixelsarranged in each row by sequentially outputting select signals to theaddress lines of each row in sync with a plurality of horizontalsynchronization signals outputted in sync with a verticalsynchronization signal during each exposure period.
 19. The area imagesensor according to claim 7, wherein a predetermined point of the imageread area is the point where the pixel for which a reference receivedlight amount from the imaging optical system is maximum is located. 20.The area image sensor according to claim 7, wherein the horizontalcorrection coefficient is determined on the basis of the reciprocalnumber of the ratio of a reference received light amount of each pixelarranged on the horizontal coordinate axis that passes through thepredetermined point with respect to the reference received light amountof the pixel located at the predetermined point; and the verticalcorrection coefficient is determined on the basis of the reciprocalnumber of the ratio of the reference received light amount of each pixelarranged on the vertical coordinate axis that passes through thepredetermined point with respect to the reference received light amountof the pixel located at the predetermined point.
 21. The area imagesensor according to claim 7, comprising: a plurality of A/D conversionmeans provided in each column that perform conversion to a digitalsignal by comparing the level of an analog photoelectric conversionsignal that is outputted by a plurality of pixels arranged in eachcolumn with a predetermined reference level; first reference levelsetting means that set, for the A/D conversion means, a differentreference level for each row in accordance with a value that isassociated with the vertical correction coefficient when a photoelectricconversion signal is outputted by a plurality of pixels arranged in eachrow in row units; and second reference level setting means that set, foreach of the A/D conversion means, a different reference level inaccordance with a value that is associated with the horizontalcorrection coefficient.
 22. The area image sensor according to claim 7,comprising: a plurality of A/D conversion means provided in each columnthat perform conversion to a digital signal by comparing the level of ananalog photoelectric conversion signal that is outputted by a pluralityof pixels arranged in each column with a predetermined reference level;first reference level setting means that set, for the A/D conversionmeans, a different reference level for each row in accordance with avalue that is associated with the vertical correction coefficient whenan analog signal is outputted by a plurality of pixels arranged in eachrow in row units; and second reference level setting means that countthe output of each of the A/D conversion means with a predeterminedcount range serving as a reference and set a different count range foreach of the A/D conversion means in accordance with a value that isassociated with the horizontal correction coefficient.
 23. The areaimage sensor according to claim 7, comprising: horizontal correctioncoefficient storage means that pre-store a horizontal correctioncoefficient corresponding with each point located on a horizontalcoordinate axis that passes through a predetermined point of the imageread area; vertical correction coefficient storage means that pre-storea vertical correction coefficient corresponding with each point locatedon a vertical coordinate axis that passes through a predetermined pointof the image read area; and multiplication means that multiply aphotoelectric conversion signal that is outputted by each pixel in theimage read area by a horizontal correction coefficient correspondingwith a horizontal coordinate of the pixel that is stored in thehorizontal correction coefficient storage means and by a verticalcorrection coefficient corresponding with a vertical coordinate of thepixel that is stored in the vertical correction coefficient storagemeans.